Quadrics including communication boards

Besides the communication boards there are two basic components of the Quadrics, one ZCPU, that controls the program flow, making all integer and address calculations, and a mesh of floating point processors, the MADS.

The MADS are organized in groups of eight processors building one 2x2x2 processing board. The connection of these processing boards is done with help of communication boards and determines the topology. The QH2 for example is sold as a 8x8x4 processor machine, the Q4-open as a 4x4x2 processor machine.

Whereas the communication between next neighbours, housed on the same board, is no problem (it is organized by a commuter), the off board communication has to be controlled by something, which is the communication board. With help of these boards also other topologies are possible, but once choosen, it is fixed.

For more informations on topology and communication see those pages.

The peak performance of all configurations, the topology does not matter, is based on the performance of the single processors. Their peak performance is 50 MFlop (frequency of 25 MHz, two operations per cycle). Therefore the total peak performance of a Qn is n times 400 MFlop.

The full configuration, which consists of 4 towers (4xQH4), each tower of 4 crates and each crate of 16 processing boards, i.e. it collects 2048 MAD processors, has therefore a peak performance of 100 GFlop. (This causes the name APE-100).

The DFG - system consisting of one QH2 and one Q1 has together 13.2 GFlop.

For the practical use not the peak performance but the effective performance is of interest. Deviations from peak performance are due to memory access and integer (ZCPU) calculation, that could not be hidden behind the floating point calculations. For this it is no rareness to get only 20 or even 10 percent of the peak performance. This is not the case for the Quadrics. Programs that match the architecture well, as they appear e.g. in lattice field theory, can reach up to 75% of peak performance!